c o p y r igh t @ w i n s em i microelectronics c o . , lt d . , a l l ri g h t r e s er v ed . wt wt wt wt pa12 pa12 pa12 pa12 a60 a60 a60 a60 sw sw sw sw rev.a may .201 1 sensitive sensitive sensitive sensitive gate gate gate gate bi-directional bi-directional bi-directional bi-directional triode triode triode triode thyristor thyristor thyristor thyristor features ? repetitive peak off -state voltage:600v ? r.m.s on-state current(it(rms)=12a) ? low on-state voltage (1.55v(max.)@i tm ? high commutation dv/dt ? halogen free (WTPA12A60SW-hf) general description general purpose switching and phase control applications .these devices are intented to be interfaced directly to miro-controllers,logic integrated circuits and other low power gatetrigger circuits such as fan speed and temperature modulation control,lighting control and static switching relay. by using an internal ceramic pad, the wtpa series provides voltage insulated tab (rated at 2500v rms) complying with ul standards (file ref.:e347423) absolute maximum ratings (t j =25 unless otherwise specified) symbol param eter ratings units v drm / vprm peak repetitive forward blocking voltage(gate open) (note1) 600 v i t(rms) forward current rms(all conduction angles, t j =58 ) 12 a i tsm peak forward surge current, (full cycle, sine wave,50/60hz) 120/126 a i 2 t circuit fusing considerations (tp=10ms) 100 a 2 s p gm peak gate power forward,(t j =58 ,pulse with 1.0us) 5 w p g(av) average gate power forward,(over any 20ms period) 1.0 w di/dt critical rate of rise of on-state current i tm =20a;i g =200ma;di g /dt=200ma/ s t j =125 50 a/ s i fgm peak gate current forward, t j =125 (20 s,120pps) 4 a v rgm peak gate voltage reverse,tj=125 (20 s,120pps) 10 v t j junction temperature -40~125 t stg storage temperature -40~150 note1.although not recommended off -state voltages up to 800v ,may be applied with out damage, but the triac may switjh to the on-state .the rate of rise of current should not exceed 15a/us. thermal characteristics symbol parameter value units r ? jc thermal resistance junction to case 2.3 /w r ? ja thermal resistance junction to ambient 60 /w
steady, steady, steady, steady, keep keep keep keep you you you you advance advance advance advance w w w w t t t t pa12 pa12 pa12 pa12 a60 a60 a60 a60 sw sw sw sw 2 / 6 e lectrical characteristics (tc=25 unless otherwise noted) symbol characteristics min. typ. max. unit i drm /i rrm peak forward or reverse blocking current (v drm =v rrm ) t j =25 - - 5 a tj=125 - - 1 ma v tm forward "on" voltage (note2) (i tm =17a tp=380 s) - - 1.55 v i gt gate trigger current (continuous dc) (v d =12 vdc,r l =30 ? ) t2+g+ t2+g- t2-g- - - - - - - 10 10 10 ma v gt gate trigger voltage (continuous dc) (v d =12 vdc,r l =30 ? ) t2+g+ t2+g- t2-g- - - - - - - 1.2 1.2 1.2 v v gd gate threshold voltage (v d =v drm ,r l =3.3k ? ,t j =125 ) 0.2 - - v dv/dt critical rate of rise of commutation voltage(v d =0.67v drm ) 40 - - v/ s i h holding current (i t =100ma) - - 15 ma i l latching current (v d =12vdc,i gt =1.2 i gt ) t2+g+ t2+g- t2-g- - - - - - - 25 30 25 ma r d dynamic resistance - - 35 m ? note2.forward current applied for 1 ms maximum duration ,duty cycle note3.for both polarities of a2 to a1
steady, steady, steady, steady, keep keep keep keep you you you you advance advance advance advance w w w w t t t t pa12 pa12 pa12 pa12 a60 a60 a60 a60 sw sw sw sw 3 / 6 fig .1 maximum permissible non-repetitive peak o n-state current i tsm ,versus number of cycles,for sinusoidal currents,f=50hz. fig.2maximum on-state dissipation,p tot ,versus rms on-state current,i t(rms), where =conduction angle. fig . 3 non-repetitive surge p eak on-state current for a sinusoidal pulse with width tp<10ms,and corresponding value ofi 2 t fig.4 maximum permissible rms current i t(rms) , versus lead temperature t lead . fig.5 typical and maximum on-state characteristic. gig.6 relative variation of gate trigger current, h olding current and latching current versus j unction temperature (typical values).
steady, steady, steady, steady, keep keep keep keep you you you you advance advance advance advance w w w w t t t t pa12 pa12 pa12 pa12 a60 a60 a60 a60 sw sw sw sw 4 / 6 fig.7 relative variation of critical rate of d ecrease of main current versus junction temperature. fig.8 normalised gate trigger voltage v gt (t j )/v gt (25 )versus junction temperature t j fig.9 transient thermal impedance z th j-mb ,versus p ulse width t p
steady, steady, steady, steady, keep keep keep keep you you you you advance advance advance advance w w w w t t t t pa12 pa12 pa12 pa12 a60 a60 a60 a60 sw sw sw sw 5 / 6 marking marking marking marking layout layout layout layout - : winsemi semiconductor logo s : igt ? : w: the third quadrant null : the fourth quadrant ww : weekly code (01-52) yy : last two digit of calendar year (1 1 :201 1 ;1 2 :201 2 ) : hf halogen free null halogen
steady, steady, steady, steady, keep keep keep keep you you you you advance advance advance advance w w w w t t t t pa12 pa12 pa12 pa12 a60 a60 a60 a60 sw sw sw sw 6 / 6 to- to- to- to- 220 220 220 220 package package package package dimension dimension dimension dimension unit:mm
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